| CPCI Interface |
32 or 64 bit at 66 or 33MHz |
| |
3.3V I/O only |
| |
Internal arbiter supports up to 4 external
masters |
| |
Four CPCI slots (up to 4 PCI clock/bus requests) |
| |
Enhanced Intel SpeedStep Technology |
| Cable Interface |
Single port x4 link width |
| |
100MHz reference clock |
| |
256 byte maximum payload size |
| |
Automatic link training (auto-negotiate to
largest common width) |
| |
Advance flow control, CRC and error reporting |
| |
Molex 75586-0010 connector |
| Electrical/Mechanical |
3U or 6U CPCI, PICMIG 2.0-compliant, single
slot |
| |
CPCI system master or peripheral slot |
| |
3U [H x L x W] dimensions of 3.937 x 6.299 x 0.6” (100
x 160 x 1.6mm) |
| |
6U [H x L x W] dimensions of 7.8 x 6.299 x 0.6” (200
x 160 x 1.6mm) |
| |
PLX PEX 8114 bridge |
| |
32/64-Bit/33/66MHz CPCI bus on connectors
J1 & J2 |
| |
Four green front panel indicators |
| |
Automatic upstream or downstream select cable
dip switches |
| Operating Environement+ |
Temperature range 0° to 50°C (32° to
122°F) |
| |
Relative humidty 5 to 90% non-condensing |
| |
Shock: 30g acceleration peak (11ms pulse) |
| |
Vibration: 5-17 Hz 0.5” double amplitude
displacement; 7-2000Hz, 1.5g acceleration |
| |
+Designed to meet UL 60950, FCC Class B,
CE safety and emissions |
