| Processor |
Intel® Xeon 2.8GHz processor
|
| Hyper-Threading Technology |
Intel's Hyper-Threading technology makes the
Intel® Xeon processor appear as two logical processors.
The operating system and application must be optimized for
Hyper-Threading. This feature delivers faster program execution
by enabling simultaneous instruction processing using the
two logical processors.
|
| Chipset |
The E7500 Chipset provides support for a faster
system bus, DDR memory with ECC and high-speed I/O expansion.
|
| System Bus |
The E7500 Chipset supports a system bus speed
of 400MHz.
|
| Bus Speed |
ISA 16-bit/8MHz
|
| |
PCI 32-bit/33MHz or 64-bit/66MHz
|
| |
PCI-X (on-board only) 64-bit/133MHz
|
| |
Hub Link 2.0 1GB/s
|
| |
System/FSB 400MHz
|
| BIOS (Flash) |
AMIBIOS with built-in advanced CMOS setup
for system parameters, peripheral management for configuring
on-board peripherals, PCI-to-PCI bridge support and PCI interrupt
steering. Supports flash devices for BIOS upgrading via floppy
interface. Also provides integrated support for USB mass
storage devices such as USB CD-ROM, CD-RW, etc. Custom BIOSs
are available upon request.
|
| Cache Memory |
The Xeon processor supports a 512K integrated
on-die Advanced Transfer Cache (L2). The cache is an 8-way
set associative cache running at full processor core frequency.
The Execution Trace Cache (L1) is a 12K data cache that stores
thousand of decoded micro-operations. The purpose of this
L1 cache is to remove decoder latency from the processor's
main execution path. The net result is increased processor
performance.
|
| DDR200/266 Memory |
Double Data Rate (DDR) memory improves memory
data speed performance in data-intensive applications. The
DDR200/266 interface consists of two DDR memory channels
coming from the Memory Controller Hub (MCH) with each channel
connected to a separate memory module socket. The sockets
may contain either PC1600 or PC2100 DIMMs. The DIMM sockets
must contain the same size and type of ECC registered DDR
module. The maximum memory capacity is 4GB and the minimum
memory interface bandwidth is 1600MB/s per channel.
|
| Error Checking and Correction |
The memory interface supports ECC modes via
BIOS setting for multiple-bit error detection and correction
of all errors confined to a single nibble.
|
| PCI Bus Interface |
The PCI bus interface supports either a 32-bit
or 64-bit PCI backplane interface running at either a 33MHz
or 66MHz bus speed.
|
| ISA Bus |
The SBC provides a 16-bit ISA bus interface
to the backplane for legacy ISA slots.
|
| System Hardware Monitor |
The Winbond W83783S chip supports hardware
monitoring. The functions monitored are voltage, fan speed
and temperature. The SBC hardware monitor software allows
the user to program the monitor limits to provide a trigger
point for the application software. This allows the application
program to monitor these trigger points in order to send
system alert messages or perform corrective action.
|
| Floppy Drive Interface |
Supports up to two floppy disk drives in combinations
of 360K to 2.88MB.
|
| Super XGA Video Interface |
The Intel® CHIPS 69030 video interface
has 4MB of on-chip memory and supports pixel resolutions
up to 1280 x 1024. Software drivers are available for most
popular operating systems.
|
| Serial Interface |
The Super I/O controller supports two full-function
serial ports with independently programmable baud rates.
The controller has two high-speed, NS16C550 compatible, UARTs
with Send/Receive 16-Byte FIFOs. The IRQ for each serial
port has BIOS selectable addressing.
|
| USB Interfaces (Dual) |
The SBC supports two USB 1.1 ports for serial
transfers at 12 or 1.5Mbit/sec. The Universal Serial Bus
(USB) is an interface allowing for connectivity to many standard
PC peripherals via an external port.
|
| Dual Ethernet Interfaces |
— 10/100/1000 BASE-T
|
| |
The SBC's internal PCI-X bus, with a bus speed
of 133HMz, connects to Intel's 82546EB Ethernet Controller
chip. This feature provides high-speed dual Gigabit Ethernet
on LAN ports 1 and 2. The SBC also supports existing 10Mb
or 100Mb per second Ethernet networks over the same internal
PCI-X bus. RJ-45 connectors located on the I/O bracket provide
the mechanical interface to the Ethernet networks.
|
| EIDE Ultra ATA/100 Interfaces (Dual) |
Dual high-performance PCI Bus Master EIDE
interfaces are capable of supporting up to two IDE disk drives
each in a master/slave configuration. The interface supports
Ultra ATA/100 with synchronous ATA mode transfers up to 100MB
per second.
|
| Optional I/O Expansion |
Optional I/O expansion mezzanine cards connect
directly to the SBC's Memory Controller Hub (MCH) via Intel's
Hub Link 2.0 interface. This feature provides fast (1GB/s)
I/O connectivity for mezzanine expansion cards such as Trenton's
H2S2 Dual Ultra160 SCSI interface. Consult Sales for additional
I/O expansion card availability.
|
| Watchdog Timer |
The programmable watchdog timer provides a
system reset with a total range of 1ms to 60 seconds. The
programmable increments of the watchdog are 1ms, 10s and
60s.
|
| Enhanced Bi-Directional Parallel Interfaces |
The parallel port interface is compatible
with IBM PC/XT®, PC/AT®, PS/2T, Enhanced Parallel
Port (EPP1.7, EPP1.9) and Extended Capabilities Port (ECP)
modes of operation. Both the EPP and ECP modes are IEEE 1284
compliant. The parallel port has BIOS selectable addressing.
|
| Keyboard and PS/2 Mouse Interfaces |
The mini DIN connector located on the I/O
bracket provides an external interface for a PS/2 mouse and
keyboard. A "Y" adapter plugged into the mini DIN
connector allows the PS/2 mouse and keyboard to share the
same port. Internal PS/2 mouse and keyboard headers are also
available. A self-resetting fuse protects the +5V line of
the keyboard and the mouse.
|
| Power Requirements |
Typical Values CPU +5V* +12V# +3.3V*
|
| |
3.0GHz 4.05A 6.25A 3.08A
|
| |
2.8GHz 3.85A 4.54A 3.05A
|
| |
2.4GHz 3.84A 4.13A 3.02A
|
| |
2.0GHz 3.80A 3.64A 3.02A
|
| |
-12V @ <100mA*
|
| |
* From Backplane via PICMG® Connector.
|
| |
# From ATX12V power supply or equivalent via
P4 connector.
|
| |
The Intel® Xeon processor's power requirements
created the need for an additional on-board 4-pin power connector
(P4). This connector requires +12V from an external power
supply that conforms to the ATX12V power specification.
|
| |
This external power supply should have a minimum
wattage rating of at least 250W. The XPI also requires that
3.3V be applied to the backplane from the power supply.
|
| |
The system power supply must conform to the
power sequencing specifications of ATX compliant power supplies.
Voltage levels must be regulated within a range of +/- 5%.
|
| Power Fail Detection |
The SBC continuously monitors the incoming
+5V and +3.3V power lines from the system backplane. If the
5V line drops below 4.75 volt or the 3.3V line drops below
2.97 volt, the XPI issues a hardware-reset command. This
feature helps maintain control and allows the system to automatically
restart. A two-pin header is available for applications that
require an external reset switch. On-board power lines are
also monitored in a similar fashion.
|
| Battery |
Built-in lithium battery for data retention
of CMOS memory.
|
| Temperature/Environment |
Operating Temperature: 0° — 45° C
|
| |
Storage Temperature: -40° to 70° C.
|
| |
Humidity: 5% to 90% non-condensing
|
| |
A Xeon processor can consume as much as 70
Watts of power on the XPI single board computer. The SBC's
cooling system uses a high-reliability fan.
|
| Mechanical |
The SBC has a low-profile (2.05" height)
active cooling system. The SBC's cooling system may cover
up additional slots in a typical PCI/ISA passive backplane
system. Overall dimensions for the XPI, including the active
cooling system are 13.3"L (338mm) x 4.8"H (121.9mm)
x 2.05"W (52.1mm).
|
| Standards |
- IEEE P996, Personal Computer Bus Standard
|
| |
- PCI Local Bus Specification 2.2
|
| |
- PICMG 1.0 Specification
|
| Mean Time Between Failures (MTBF) |
154,000 POH (Power-On Hours) at 40° C.,
per Bellcore.
|
