| Processors |
Dual Intel® Xeon™ processors
at speeds of 2.8GHz low voltage, 3.2GHz, or 3.6GHz Processor
Package: FC-mPGA4 package (604-pin) |
| Chipset |
The System Host Board (SHB) uses the Intel® E7520
chipset featuring an 800MHz system bus, Symmetric Multiprocessing
Protocol for two processors operating on the 800Mz system
bus, Hyper-Threading Technology and a dual channel DDR2-400
memory interface. Three x8 PCI Express interfaces are supported
by the chipset. See the PCI Express Interfaces section for
details on how PCI Express is implemented. The Intel® E6300ESB
I/O Controller Hub supports the SHB’s dual Serial ATA/150
ports, four USB 2.0 interfaces, dual Ultra ATA/100 interfaces
and the video and Ethernet controllers. The I/O Controller
Hub’s LPC interface is routed to the board’s
controlled impedance connector and supports an optional I/O
expansion board for legacy I/O and serial port communications.
Communications between the Intel® E7520 Memory Controller
Hub and the I/O Controller Hub occurs over a 266MB/s Hub
Interface. |
| Dual Ethernet |
10/100/1000BASE-T |
| |
The SHB’s Gigabit Ethernet Controller
(Intel® 82546EB) connects to the I/O Controller Hub via
a PCI-X 64-bit/66MHz interface to provide high-speed 10/100/1000Base-T
Ethernet interfaces on LAN ports 1 and 2. RJ-45 connectors,
located on the I/O bracket, provide the physical interface
to the Ethernet network. |
| Dual Serial ATA/150 Ports: |
The primary and secondary Serial ATA (SATA)
ports on the SHB boards comply with the SATA 1.0 specification
and support two independent SATA storage devices such as
hard disks and CD-RW devices. SATA technology provides lower
pin counts, reduced signaling voltages, simplified cabling,
CRC error detection and hot-plug support. SATA produces higher
performance interfacing by providing data transfer rates
up to 150MB per second on each port. |
| Cache Memory (L2 AND L1): |
The Intel® Xeon™ processor’s
level two (L2) cache memory is an integrated on-die Advanced
Transfer Cache memory that is 8-way set associative with
ECC and runs at the full processor core frequency. The L2
cache memory size is 1MB for the most common embedded processors
used on the SHB. Non-embedded Intel® Xeon™ processors
with a 2MB L2 cache memory are also available for use, contact
One Stop Systems for ordering details. |
| |
The Intel® Xeon™ processors have
a 16K level one (L1) data cache. |
| DDR2-400 Memory |
The four DIMM sockets on the SHB support a
total memory capacity of 8GB and the DDR2 memory interface
can operate as either a single-channel or dual-channel interface.
The theoretical maximum memory bandwidth for single-channel
operation is 3.2GB/s and 6.4GB/s for dual-channel mode. Each
of the channels (A and B) terminates in two dual in-line
memory module (DIMM) sockets. The System BIOS automatically
detects memory type, size and speed. The memory modules used
on the SHB must be PC2-3200 compliant. The SHB supports a
DDR2-400 memory interface speed. Modules with a faster memory
speed may be used; however, they will be automatically clocked
down to the DDR2-400 memory interface speed by the System
BIOS and the SHB’s memory interface components. |
| DDR2-400 Memory DIMM Slot Population |
DDR2-400 memory modules are available as either
single rank or dual rank DIMMs. A rank refers to the 72-bit
unit of devices or DRAM chips that make up the PC2-3200 ECC
registered 240-pin DDR2-400 DIMM. Single or dual rank memory
modules must be placed in the SHB's DIMM sockets using prescribed
population rules to ensure proper memory interface operation
and performance. |
| Ultra XGA Video Interface |
The SHB is equipped with the third generation
ATI® RAGE™ MOBILITY™ MI video controller.
The M1 enables 2D/3D video acceleration and provides 8MB
of integrated video memory. In 2D mode the video controller
supports pixel resolutions up to 1600 x 1200, and in 3D mode
the maximum resolution provided is 1280 x 1024. The maximum
color depth supported at these extremes is 16.7 million colors.
Software drivers are available for popular operating systems. |
| Power Requirements |
Typical Values CPU +5V +12V +3.3V |
| |
3.6GHz 3.75A 17.00A 3.50A |
| |
3.2GHz 3.75A 15.40A 3.50A |
| |
2.8GHz* 3.75A 9.70A 3.50A |
| |
-12V @ <100mA |
| |
Tolerance for all voltages is +/- 5% |
| |
*Low Voltage Intel® Xeon™ processor |
| |
The external power supply should have a wattage
rating of at least 400W to ensure adequate power delivery
to an SHB using the fastest high performance Intel® Xeon™ processors. |
| Temperature/Environment |
Operating Temperature: 0° to 45° C. |
| |
*LV Xeon Operating Temperature: 0° to
55° C. |
| |
Storage Temperature: -20 to 70 C. |
| |
Humidity: 5% to 90% non-condensing |
| |
The high-performance Intel® Xeon™ processors
used on the SHB may consume over 100 Watts of power. The
SHB's cooling system uses a high-reliability fan mounted
to the SBC. |
| Mechanical |
An active cooling system is used on the SHB
to ensure reliable processor operation at elevated temperatures.
Overall dimensions for the SHB, including the active cooling
system, are 13.3” L (338mm) x 4.976” H (126.4mm)
x 2.3” W (58.4mm). |
| |
Note: The PICMG 1.3 board height specification
is approximately .176” (4.47mm) taller than the PICMG
1.0 specification. However, relative PICMG 1.3 board height
off the backplane is the same due to the shorter edge connectors
of a PICMG 1.3 system host board and the shorter PCI Express
connectors on a PICMG 1.3 backplane. |
| PCI Express™ Interfaces |
One Stop Systems' system host board provides
two x8 PCI Express links, one x4 PCI Express link and five
PCI Express reference clocks routed to edge connectors A
and B. These PCI Express links are used on SHB Express™ backplanes
to support PCI Express option cards and bridge chips that
provide PCI/PCI-X option card support. During system initialization
the SHB automatically negotiates with the devices connected
to the PCI Express links in order to set up communication
between these devices. The net result is that the SHB system
host board supports communication to x1, x4, x8, x16 PCI
Express boards and PCI Express switch chips as well as PCI/PCI-X
cards via PCI Express-to-PCI/PCI-X bridge technology on the
backplane. |
| PCI Express™ Configuration and Bus Speed |
Edge Connector A & B — Two x8 links, one
x4 link |
| |
- Five reference clocks |
| |
PCI Express — (on-board only) — One x4 link |
| |
PCI-X (on-board only) — 64-bit/66MHz |
| |
PCI (on-board only) — 32-bit/33MHz |
| |
Hub Link 1.5 — 266MB/s |
| |
System or FSB — 800MHz |
| BIOS (Flash) |
The SHB uses AMIBIOS8®. The flash BIOS
resides in the 2802AC Firmware Hub (FWH). AMIBIOS8 contains
features such as: |Support for flash devices for BIOS upgrading
via floppy interface |
| |
Integrated support for USB mass storage devices
such as USB CD-ROM, CD-RW, etc. |
| |
Boot from network, USB mass storage devices,
IDE or ATAPI |
| |
Serial port console redirection to support
headless operation (requires optional IOB30, part no. 6391-000) |
| |
SATA/ATA/ATAPI support includes 48-bit LBA
addressing to support SATA/ATA/IDE hard drive capacities
over 137GB |
| IO Expansion Board (Optional) |
This optional board provides legacy I/O connections
via the Super I/O controller (LPC47B272). The IO board’s
I/O controller connects to the SHB's LPC Bus via the board’s
controlled impedance connector. The following I/O interfaces
are supported by the SHB via the IO board: |
| Serial Interface |
The Super I/O controller supports two full-function
serial ports with independently programmable baud rates.
The controller has two high-speed, NS16C550 compatible UARTs
with Send/Receive 16-byte FIFOs. |
| |
The IRQ for each serial port has BIOS selectable
addressing. |
| Floppy Drive Interface |
The IO board supports up to two floppy disk
drives in combinations of 360K to 2.88MB. |
| KB AND PS/2 Mouse Interfaces |
The mini DIN connector located on the I/O
bracket provides an external interface for a PS/2 mouse and
keyboard. A "Y" adapter plugged into the mini DIN
connector allows the PS/2 mouse and keyboard to share the
same port. Internal PS/2 mouse and keyboard headers are also
available. A self-resetting fuse protects the +5V line of
the keyboard and the mouse. |
| Parallel Interfaces |
The parallel port interface is compatible
with IBM PC/XT®, PC/AT®, PS/2™, Enhanced Parallel
Port (EPP1.7, EPP1.9) and Extended Capabilities Port (ECP)
modes of operation. Both the EPP and ECP modes are IEEE 1284
compliant. The parallel port has BIOS selectable addressing. |
| |
Operating systems exhibit certain boot-up
behaviors in regards to the handling of keyboard controller
functions that may necessitate the addition of the IO board
to the SHB. |
| |
The operating systems that One Stop Systems
has tested that do not require the IO board are: |
| |
Microsoft® Windows® 2000 |
| |
Microsoft® Windows® XP (using Service
Packs 1, 1A or 2) |
| |
Microsoft® Windows® 2003 Server |
| |
The operating systems that One Stop Systems
has tested that require the IO board in order to provide
required PS/2 keyboard functions are: |
| |
RedHat Linux 9.0 |
| |
Fedora Linux 9.0 |
| |
SUSE Linux 9.0 |
| |
SCO ODT 5.05 |
| |
Unixware® 7.11 |
| |
Sun® Solaris™ 9.0 |
| |
Microsoft® Windows® NT 4.0 |
| |
Future SHB BIOS upgrades may eliminate the
need for the IOB30 to provide PS/2 keyboard functionality
with additional operating systems. |
| Battery |
Built-in lithium battery for data retention
of CMOS memory. |
| Quad USB Interfaces |
The SHB supports four high-speed USB 2.0 ports
for data transfers up to 480Mbit/sec. It also supports USB
1.1 devices for data transfers at 12 or 1.5Mbit/sec. Two
USB 2.0 interface ports are located on the SHB's I/O bracket.
Two additional USB 2.0 headers are available on the SHB.
The SHB supports the optional routing of two of the USB 2.0
interfaces to an SHB Express backplane. Contact One Stop
Systems if your application requires this feature. |
| Watchdog Timer |
The programmable watchdog timer is supported
directly by the I/O Controller Hub. Two operating modes,
free-running and one-shot, are available with this two-stage
watchdog timer. Stage one can generate IRQ, SMI or SCI, and
stage two generates a programable watchdog timer reset with
a total range of 1ms to 10 minutes. |
| Agency Approvals & Industry Compliance |
Designed for UL60950, CAN/CSA C22.2 No. 60950-00,
EN55022:1998 Class B, EN61000-4-2:1995, EN61000-4-3:1997,
EN61000-4-4:1995, EN61000-4-5:1995, EN61000-4-6:1996, EN61000-4-11:1994 |
| Standards |
- PCI Express Base Specification 1.0a |
| |
- SHB Express™ System Host Board PCI
Express specification |
| |
- PCI Industrial Computer Manufacturers Group
(PICMG®) 1.3 |
| Mean Time Between Failures (MTBF): |
TBD POH (Power-On Hours) at 40 °C., per
Bellcore |
