| Processor |
Intel Pentium D Processor at 3.2GHz
or 3.0GHz |
| Chipset |
The dual-core SHB’s Intel 945G chipset
combines advanced video and graphics capabilities with high-bandwidth
interfaces such as a dual-channel DDR2-667, 1066MHz FSB,
PCI Express x16 graphics port and PCI Express x4 and x1 links
to a PICMG 1.3 backplane. An Intel ICH7R I/O Controller Hub
provides eight USB 2.0 and four SATA/300 ports. The ICH7R’s
SATA controller supports independent DMA, Advanced Host Controller
Interface (AHCI) and integrated RAID level 0, 1, 5 and 10
functionality. The I/O Controller Hub’s LPC interface
is routed to the board’s controlled impedance connector
and supports an optional I/O expansion board (One Stop System’s
IOB30) for legacy I/O and serial port communications. A x1
PCI Express (PCIe) link is also routed from the ICH7R to
the controlled impedance connector to provide an additional
x1 PCIe link to a PICMG 1.3 backplane when using One Stop
System’s OSS-ACC-IO-1 board. Communications between
the Intel® 945G Memory Controller Hub and the Intel ICH7R
I/O Controller Hub occurs over the Direct Media Interface
(DMI) at a data transfer rate of 10Gb/s in each direction. |
| Ethernet Interfaces |
The dual-core SHB uses an internal x1 PCI
Express link to connect the I/O Controller hub to a dual-port
Gigabit Ethernet controller chip. This design feature enables
dual 10/100/1000Base-T Ethernet interfaces on LAN 1 and LAN2.
The LAN ports on the DUAL-CORE SHB have RJ-45 connectors
on the I/O bracket to provide the mechanical interfaces to
the Ethernet networks. The ICH7R’s internal LAN Interconnect
Interface (LCI) is connected to the Intel 82562G1 Ethernet
controller chip to provide an additional 10/100Base-T Ethernet
interface for use on PICMG® 1.3 backplanes via the SHB’s
edge connector C. |
| Four Serial ATA/300 Ports |
The primary and secondary Serial ATA (SATA)
ports on the DUAL-CORE SHB board support four independent
SATA storage devices such as hard disks and CD-RW devices.
SATA produces higher performance interfacing by providing
data transfer rates up to 300MB per second on each port.
The DUAL-CORE SHB’s ICH7R I/O Controller hub features
Intel® Matrix Storage Technology, which allows the ICH7R’s
SATA controller to be configured as a RAID controller supporting
RAID 0, 1, 5, and 10 implementations. |
| Cache Memory (L2 AND L1) |
The Intel Pentium 4 Processor 651 and other
600 series processors feature a level two (L2) cache memory
integrated on-die with Advanced Transfer Cache memory that
is 8-way set associative with ECC and runs at the full processor
core frequency. The L2 cache memory size is 2MB, however
other Intel® Pentium® 4 processors (500 series) supported
on the dual-core SHB have a 1MB L2 cache.
The Intel Pentium D processors feature either two 1MB level
two (L2) cache memories (2x1MB) or two 2MB level two (L2)
cache memories (2x2MB) for a total of 2MB and 4MB L2 cache
respectively. The L2 cache is integrated on-die with Advanced
Transfer Cache memories that are 8-way set associative with
ECC and run at the full processor core frequency.
The Intel Celeron® D processors feature a 256KB or 512KB
level two (L2) cache memory.
All processor options supported on the dual-core SHB have
a 16KB level one (L1) data cache. |
| DDR2-667 Memory |
The DDR2-667 memory interface is a dual-channel
interface originating at the Memory Controller Hub, with
each channel terminating at a DIMM module socket. The dual-core
SHB supports system memory transfer rates of either 400,
533 or 667MHz using unbuffered, non-ECC, PC2-3200, PC2-4200
or PC2-5300 DIMMs. Maximum memory capacity is 4GB. When using
a single PC2-5300 DIMM, the memory interface bandwidth is
5.4GB/s and using two DIMMs with equal memory capacities
increases the peak memory bandwidth to 10.7GB/s. To maximize
system performance and reliability One Stop Systems recommends
using DIMMs that support the Serial Presence Detect (SPD)
data structure. |
| Memory DIMM Slot Population |
One Stop System's dual-core SHB supports two
types of memory operations:
Interleaved Mode — This is the mode of operation that enables
the highest memory interface speed and bandwidth throughput
capability. Often times this mode of operation is referred
to as "dual-channel mode". Interleaved mode occurs
when using two DIMM modules with equal memory capacities.
The DIMM technology and device width can vary but the installed
memory capacity for each channel must be equal. If different
speed DIMMs are used in each channel then the slowest DIMM
will determine the memory interface speed.
Asymmetric Mode — From a system operational standpoint, asymmetric
mode functions as a "single-channel" memory interface.
Asymmetric mode occurs when using either a single DIMM module
or two DIMM modules with unequal memory capacities The DIMM
technology and device width can vary in each channel and
if different speed DIMMs are used in each channel then the
slowest DIMM will determine the memory interface speed.
NOTE: Double-sided DIMMS with a x16 organization are not
supported. |
| Power Requirements |
Typical Values — 100% Stressed via MS Windows
HCT’s System Stress
CPU +5V +12V +3.3V
3.2GHz# 3.90A 10.34A 3.27A
3.4GHz 3.60A 4.42A 3.27A
3.0GHz 2.64A 6.70A 3.27A
2.93GHz* 3.00A 3.59A 3.27A -12V @ <100mA
Typical Values — System Idling In Windows XP Desktop
CPU +5V +12V +3.3V
3.2GHz# 3.02A 3.22A 3.27A
3.4GHz 2.56A 1.53A 3.27A
3.0GHz 2.40A 2.50A 3.27A
2.93GHz* 2.25A 1.71A 3.27A
-12V @ <100mA
Tolerance for all voltages is +/- 5% and must be applied
by the PICMG 1.3 backplane to edge connector C.
All processors listed are Intel Pentium 4 except: (#) Intel
Pentium D 940 and (*) Intel Celeron D 341. |
| Temperature/Environment |
Operating Temperature 0° to 45° C.
Storage Temperature: -40 to 70 C.
Humidity: 5% to 90% non-condensing
Operating Temperature: 0° to 40° C. (with Intel Pentium
D processors)
The high-performance Intel processors used on the DUAL-CORE
SHB may consume over 100 Watts of power. The dual-core SHB’s
cooling system uses a high-reliability fan mounted to the
SBC. |
| Mechanical |
In a typical backplane, the dual-core SHB’s
cooling solution enables placement of option cards approximately
3.28" (60.45mm) away from the top component side of
the SHB. The dual-core SHB’s overall dimensions are
13.330” (33.858cm) L x 4.976” (12.639cm) H. The
relative PICMG 1.3 SHB height off the backplane is the same
as a PICMG 1.0 SBC due to the shorter PCI Express backplane
connectors. |
| PCI Express Interfaces |
One Stop Systems' dual-core SHB graphics-class
system host board provides one x16 PCI Express link on the
SHB’s edge connectors A and B. This x16 PCIe link is
designed to support PCI Express video/graphics cards on an
SHB Express(PICMG 1.3) backplane. A x4 PCI Express link and
five PCI Express reference clocks are also included on edge
connectors A and B.
An additional x1 PCI Express link between the dual-core SHB
and backplane can be provided by One Stop Systems' optional
OSS-ACC-IO-1 Expansion Module. The x4 and x1 PCI Express
links are used on SHB Express backplanes to support PCI Express
option cards and the bridge chips that provide PCI/PCI-X
option card support. During system initialization the dual-core
SHB automatically negotiates with the PCI Express cards connected
to the PCI Express links in order to set up communication
between the devices. The net result is that the dual-core
SHB system host board supports communication to x1, x4, x8
and x16 PCI Express boards as well as PCI/PCI-X cards via
PCI Express-to-PCI/PCI-X bridge chip technology.
The dual-core SHB also provides a 32-bit/33MHz PCI bus interface
on edge connector D. |
| PCI Express Configuration and Bus Speed |
PCI Express
Edge Connector A & B: One x16 link, one x4 link; five
reference clocks
PCI Express — (on-board only): Two x1 links
PCI: 32-bit/33MHz
System or FSB: 1066MHz, 800MHz or 533MHz |
| BIOS (Flash) |
The dual-core SHB uses AMIBIOS8®. The
flash BIOS resides in the Firmware Hub (FWH). AMIBIOS8 contains
features such as:
Support for flash devices for BIOS upgrading
Integrated support for USB mass storage devices such as USB
CD-ROM, CD-RW, etc.
Boot from network, USB mass storage devices, IDE or ATAPI
Serial port console redirection to support headless operation
(requires optional OSS-ACC-IO-0 or OSS-ACC-IO-1)
SATA/ATA/ATAPI support includes 48-bit LBA addressing to
support SATA/ATA/IDE hard drive capacities over 137GB |
| Video Interface |
The dual-core SHB supports three video connection
options:
Direct connection via the chipset’s Intel Graphics
Media Accelerator 950 with faster graphics and 3D performance
A x16 PCI Express graphics port that provides 3.5 times more
bandwidth than an AGP 8X interface
ADD2 video and graphic cards |
| OSS-ACC-IO-0 Expansion Board (Optional) |
This optional board provides legacy I/O connections
via the Super I/O controller (LPC47B272). The OSS-ACC-IO-0's
I/O controller connects to the dual-core SHB’s LPC
Bus via the board’s controlled impedance connector.
The following I/O interfaces are supported by the dual-core
SHB via either the OSS-ACC-IO-0 or OSS-ACC-IO-1. |
| Serial Interface |
The Super I/O controller supports two full-function
serial ports with independently programmable baud rates.
The controller has two high-speed, NS16C550 compatible UARTs
with Send/Receive 16-byte FIFOs. The IRQ for each serial
port has BIOS selectable addressing. |
| Floppy Drive Interface |
The OSS-ACC-IO-0 supports up to two floppy
disk drives in combinations of 360K to 2.88MB. |
| KB AND PS/2 Mouse Interfaces |
The mini DIN connector located on the I/O
bracket provides an external interface for a PS/2 mouse and
keyboard. A "Y" adapter plugged into the mini DIN
connector allows the PS/2 mouse and keyboard to share the
same port. Internal PS/2 mouse and keyboard headers are also
available. A self-resetting fuse protects the +5V line of
the keyboard and the mouse. |
| Parallel Interface |
The parallel port interface is compatible
with IBM PC/XT®, PC/AT®, PS/2™ , Enhanced Parallel
Port (EPP1.7, EPP1.9) and Extended Capabilities Port (ECP)
modes of operation. Both the EPP and ECP modes are IEEE 1284
compliant. The parallel port has BIOS selectable addressing. |
| Operating Systems |
Operating systems exhibit certain boot-up
behaviors in regards to the handling of keyboard controller
functions that may necessitate the addition of the OSS-ACC-IO-0
or OSS-ACC-IO-1 to the DUAL-CORE SHB.
The operating systems that One Stop System has tested that
do not require the OSS-ACC-IO-0 or OSS-ACC-IO-1 are:|Microsoft® Windows® 2000
Microsoft Windows XP
Microsoft Windows 2003 Server
Microsoft Windows NT 4.0
RedHat Linux 9.0
Fedora Core 2.0
SUSE Linux 9.0
The operating systems that One Stop System has tested that
require the OSS-ACC-IO-0 or OSS-ACC-IO-1 in order to provide
required PS/2 keyboard functions are:
Unixware® 7.11
Sun® Solaris™9.0
SCO ODT 5.05 |
| OSS-ACC-IO-1 Expansion Board (Optional) |
The OSS-ACC-IO-1 supports all of the same
I/O functions as the OSS-ACC-IO-0 using cable header connectors.
There is no I/O plate on the OSS-ACC-IO-1. The OSS-ACC-IO-1
also provides a x4 PCI Express edge connector designed to
fit into a PCI Express expansion slot on a PICMG 1.3 backplane.
When used on the dual-core SHB, the OSS-ACC-IO-1 provides
an extra x1 PCI Express link to the backplane. |
| Battery |
Built-in lithium battery for data retention
of CMOS memory. |
| Eight USB Interfaces |
A total of eight USB 2.0 interfaces are supported
by the dual-core SHB. USB ports 0 and 1 are on the I/O bracket
and ports 2, 3, 4 and 5 have header connectors on the DUAL-CORE
SHB. USB ports 4 and 5 can be routed to edge connector C
for use on a PICMG® 1.3 backplane. The backplane routing
for USB 4 and 5 is a factory-build option. Contact One Stop
System for ordering details. USB ports 6 and 7 are routed
directly to the dual-core SHB’s edge connector C |
| Agency Approvals and Industry Compliance |
Designed for UL60950, CAN/CSA C22.2 No. 60950-00,
EN55022:1998 Class B, EN61000-4-2:1995, EN61000-4-3:1997,
EN61000-4-4:1995, EN61000-4-5:1995, EN61000-4-6:1996, EN61000-4-11:1994 |
| Standards |
PCI Express Base Specification 1.0a
— SHB Express System Host Board PCI Express specification
— PCI Industrial Computer Manufacturers Group (PICMG) 1.3 |
| Mean TIme Between Failures (MTBF) |
TBD POH (Power-On Hours) at 40°C., per
Bellcore |
